Hybrid low power technology for mobile multimedia systems

Power consumption is a critical problem for very large scale integration (VLSI) systems, especially in deep-sub micro systems. Due to the systems are more and more complex, the power issue is a challenge for IC (integrated circuits) design. Hence, this paper develops a hybrid low power technology (HLPT) to deal with the different complexity applications. Additionally, the proposed HLPT is from system-level algorithm to physical level. The experimental results are implemented on the embedded system, PAC (parallel architecture core) Duo+, to show the good performance for achieving 90% power saving.