Title :
Enhancing a VHDL based design methodology with application specific data abstraction
Author_Institution :
DSC Commun. A/S, Brondby, Denmark
fDate :
29 Aug-1 Sep 1995
Abstract :
VHDL has successfully been introduced into the design methodology for VLSI ASICs. This paper describes a high-level data abstraction and supporting tool that enhances this methodology in the telecommunication application domain. A significant performance gain was obtained by introducing the data abstraction outside the VHDL simulator. The enhanced methodology has been used in current ASIC designs with good results
Keywords :
VLSI; application specific integrated circuits; data structures; hardware description languages; logic CAD; performance evaluation; telecommunication computing; ASIC design; VHDL; VHDL simulator; VLSI ASIC; application specific data abstraction; circuit design; design methodology; high-level data abstraction tool; performance gain; telecommunication application; Application specific integrated circuits; Design methodology; Formal verification; Microprocessors; Multiplexing equipment; Performance gain; Spine; Synchronous digital hierarchy; Telecommunication traffic; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
DOI :
10.1109/ASPDAC.1995.486199
