A robust min-cut improvement algorithm based on dynamic look-ahead weighting

Author

Tani, Katsunori

Author_Institution

C&C Res. Labs., NEC Corp., Kanagawa, Japan

fYear

1995

fDate

29 Aug-1 Sep 1995

Firstpage

127

Lastpage

133

Abstract

This paper proposes an approach to enhance Fiduccia-Mattheyses´ min-cut algorithm. The approach includes two new ideas: LOOK-AHEAD WEIGHTING and DYNAMIC WEIGHTING. The former is based on the concept of VLSI placement method using quadratic programming. The latter is a technique to carry the better behavior of move-and-lock improvement strategy. Experiments on practical circuits with 5 K~140 K cells show that the proposed approach achieves promising results

Keywords

integrated logic circuits; logic CAD; logic partitioning; VLSI placement; dynamic look-ahead weighting; min-cut improvement algorithm; move-and-lock improvement; quadratic programming; Circuits; Fabrication; Heuristic algorithms; Laboratories; Large-scale systems; National electric code; Prototypes; Quadratic programming; Robustness; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal

Conference_Location

Chiba

Print_ISBN

4-930813-67-0

Type

conf

DOI

10.1109/ASPDAC.1995.486213

Filename

486213

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3246993