DocumentCode
3247117
Title
Development of a next generation ubiquitous processor chip
Author
Fukase, Masa-aki ; Uchiumi, Harunobu ; Narita, Kazuki ; Takaki, Tatsuya ; Mimura, Naomichi ; Ichinohe, Kohei ; Sato, Takao ; Kurokawa, Atsushi
Author_Institution
Grad. Sch. of Sci. & Technol., Hirosaki Univ., Hirosaki, Japan
fYear
2011
fDate
7-9 Dec. 2011
Firstpage
1
Lastpage
4
Abstract
The ubiquitous processor has been developed under the strategy to unify PC processors, mobile processors, cryptography processors, RFID tags, etc. These devices have obviously supported the trend of ubiquitous network, computing, environment, etc. The unification of these devices has been effective to achieve power consciousness for Green IT and secureness for ubiquitous environment. The authors have developed a ubiquitous processor architecture named HCgorilla and have implemented it in CMOS standard cell chips. Then, the target of this study is the shift of HCgorilla to SoC, considering adaptability to SoC and resource-constrained implementation is cutting edge microprocessor tendency. Since this requires the total improvement of HCgorilla, the complicated clock schemes are optimized together. HCgorilla has so far applied gated clock, scan path, and waved MFU (multifunctional unit). Although the first two processor techniques have been supported by regular CAD tools, the wave-pipelining has been mainly done by manual tuning because it has not always been so popular. The specific features of the improved HCgorilla and its implementation in CMOS standard cell chips are described in this article.
Keywords
CAD; CMOS digital integrated circuits; microprocessor chips; system-on-chip; ubiquitous computing; CMOS standard cell chips; Green IT; HCgorilla; PC processors; RFID tags; SoC; applied gated clock; cryptography processors; manual tuning; microprocessor tendency; mobile processors; next generation ubiquitous processor chip; power consciousness; regular CAD tools; resource-constrained implementation; scan path; ubiquitous computing; ubiquitous environment; ubiquitous network; wave-pipelining; waved multifunctional unit; CMOS integrated circuits; Clocks; Cryptography; Design automation; Software; Solid modeling; CMOS chip; SoC; clock scheme; processor; ubiquitous;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communications Systems (ISPACS), 2011 International Symposium on
Conference_Location
Chiang Mai
Print_ISBN
978-1-4577-2165-6
Type
conf
DOI
10.1109/ISPACS.2011.6146149
Filename
6146149
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