Title :
Region definition and ordering assignment with the minimization of the number of switchboxes
Author_Institution :
Dept. of Comput. & Inf. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
29 Aug-1 Sep 1995
Abstract :
In this paper, a region definition and ordering assignment (RDAOA) algorithm for minimizing the number of switchboxes is proposed. The time complexity of the algorithm is proved to be in O(n) time, where n is the number of line segments in a given floorplan graph. Finally, several examples have been tested on the proposed algorithm and other published algorithms, and the experimental results show that our algorithm defines fewer switchboxes than other algorithms
Keywords :
circuit layout CAD; circuit optimisation; computational complexity; data flow graphs; directed graphs; network routing; switchgear; algorithm; experimental results; floorplan graph; line segments; ordering assignment; region definition; switchbox number minimization; time complexity; Information science; Pins; Routing; Testing;
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
DOI :
10.1109/ASPDAC.1995.486222
