Title :
Technology mapping for FPGAs with complex block architectures by fuzzy logic technique
Author :
Lee, Jun-yong ; Shragowitz, Eugene
Author_Institution :
Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
fDate :
29 Aug-1 Sep 1995
Abstract :
This paper describes a technology mapper for FPGAs with the complex structure of logic blocks. Most technology mappers developed so far are not effective for such complex logic block architectures as XILINX XC4000 series. The proposed mapper applies a constructive mapping algorithm and fuzzy logic rules to balance such criteria as area, timing, routability and others. Performance of the mapper is demonstrated on the set of MCNC benchmarks
Keywords :
field programmable gate arrays; fuzzy logic; logic CAD; programmable logic arrays; FPGAs; MCNC benchmarks; XILINX XC4000; area; complex block architectures; constructive mapping algorithm; fuzzy logic; routability; technology mapper; timing; Boolean functions; Computer architecture; Computer science; Field programmable gate arrays; Fuzzy logic; Programmable logic arrays; Table lookup; Timing; Tree graphs; Vegetation mapping;
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
DOI :
10.1109/ASPDAC.1995.486237
