DocumentCode :
3247785
Title :
A pipelined, parallel architecture for processing time-coincident data
Author :
Newport, D.F. ; Casey, M.E. ; Dent, H.M. ; Bouldin, D.W.
Author_Institution :
Compact Chips Inc., Knoxville, TN, USA
fYear :
1989
fDate :
8-12 May 1989
Abstract :
A pipelined parallel architecture for processing time-coincident data is described. The data to be processed are from a ring of positron emission detectors and are used for tomography. The architecture consists of an array of identical modules to determine if opposing detectors have detected a positron event. This requires a large number of internal connections and is practical only in VLSI. By implementing this architecture in VLSI, the size and cost of existing circuitry is reduced, along with the length requirements for an expensive high-speed cable
Keywords :
computerised tomography; parallel architectures; pipeline processing; parallel architecture; pipelined architecture; positron emission detectors; time-coincident data; tomography; Circuits; Costs; Detectors; Event detection; Parallel architectures; Positrons; Radioactive decay; Sensor arrays; Tomography; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
Type :
conf
DOI :
10.1109/CMPEUR.1989.93418
Filename :
93418
Link To Document :
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