DocumentCode :
3247975
Title :
Multimedia extensions for a reconfigurable processor
Author :
Bigdeli, Abbas ; Biglari-Abhari, Morteza ; Leung, Simon H S ; Wang, Kevin I-kai
Author_Institution :
Dept. of Electr. & Comput. Eng., Auckland Univ., New Zealand
fYear :
2004
fDate :
20-22 Oct. 2004
Firstpage :
426
Lastpage :
429
Abstract :
Today, multimedia applications are experiencing very rapid growth both in the technology market as well as in their hunger for computation power. Because of the need for rapid prototyping of emerging applications and standards, and the pressure to minimize the time to market, designers can no longer rely only on the traditional hard-wired multimedia co-processors. There is a clear need for a new design paradigm. It is important for such a paradigm to recognize emerging changes and expand or modify the multimedia extension accordingly. In this paper, we present a multimedia extension for Altera Nios®, a popular FPGA-based reconfigurable processor.
Keywords :
embedded systems; field programmable gate arrays; microprocessor chips; multimedia computing; reconfigurable architectures; FPGA based reconfigurable processors; embedded processors; processor multimedia extensions; rapid prototyping; time to market minimization; Application software; Computer architecture; Coprocessors; Handheld computers; Multimedia systems; Parallel processing; Petroleum; Prototypes; Streaming media; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Multimedia, Video and Speech Processing, 2004. Proceedings of 2004 International Symposium on
Print_ISBN :
0-7803-8687-6
Type :
conf
DOI :
10.1109/ISIMP.2004.1434091
Filename :
1434091
Link To Document :
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