DocumentCode :
3248109
Title :
Limits of using signatures for permutation independent Boolean comparison
Author :
Mohnke, Janett ; Molitor, Paul ; Malik, Sharad
Author_Institution :
Inst. fur Inf., Martin-Luther-Univ., Halle-Wittenberg, Germany
fYear :
1995
fDate :
29 Aug-1 Sep 1995
Firstpage :
459
Lastpage :
464
Abstract :
This paper addresses problems that arise while checking the equivalence of two Boolean functions under arbitrary input permutations. The permutation problem has several applications in the synthesis and verification of combinational logic: it arises in the technology mapping stage of logic synthesis and in logic verification. A popular method to solve it is to compute a signature for each variable that helps to establish a correspondence between the variables. Several researchers have suggested a wide range of signatures that have been used for this purpose. However, for each choice of signature, there remain variables that cannot be uniquely identified. Our research has shown that, for a given example, this set of problematic variables tends to be the same-regardless of the choice of signatures. The paper investigates this problem
Keywords :
Boolean functions; combinational circuits; equivalence classes; logic CAD; logic design; logic testing; Boolean functions; combinational logic; equivalence; logic synthesis; logic verification; permutation independent Boolean comparison; signatures; synthesis; technology mapping; verification; Automatic logic units; Automatic testing; Boolean functions; Circuit synthesis; Data structures; Input variables; Libraries; Logic circuits; Logic testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
Type :
conf
DOI :
10.1109/ASPDAC.1995.486356
Filename :
486356
Link To Document :
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