DocumentCode
3248153
Title
A tool for measuring quality of test pattern for LSIs´ functional design
Author
Aoki, Takashi ; Toriyama, Tomoji ; Ishikawa, Keiji ; Fukami, Kennosuke
Author_Institution
NTT LSI Labs., Kanagawa, Japan
fYear
1995
fDate
29 Aug-1 Sep 1995
Firstpage
465
Lastpage
469
Abstract
A prototype tool is developed for measuring the quality of test patterns for simulation to verify LSI functional designs. The tool is able to count activated conditional branches and evaluate the branch pass index of test patterns. The branch pass index indicates the ratio of the number of conditional branches validated by the pattern to the total number of conditional branches in a design. We developed the prototype tool for PARTHENON. The tool prints out branch identification names not examined by the test pattern. In using the tool for experimental designs, it helped designers to significantly improve pattern quality if a branch pass index of 100% for LSI verification patterns was not achieved. Only about 30 seconds of the processing time was required for a 1000 sentence module. Bugs can often be found in designs with little effort
Keywords
large scale integration; logic CAD; logic testing; LSI functional designs; PARTHENON; branch pass index; prototype tool; quality of test patterns; simulation; test pattern; test patterns; Algorithm design and analysis; Computer bugs; Design for experiments; Hardware design languages; Laboratories; Large scale integration; Prototypes; Software quality; Software testing; Virtual prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location
Chiba
Print_ISBN
4-930813-67-0
Type
conf
DOI
10.1109/ASPDAC.1995.486357
Filename
486357
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