• DocumentCode
    3248660
  • Title

    A Paramount Pair of Cache Replacement Algorithms on L1 and L2 Using Multiple Databases with Security

  • Author

    Gupta, Richa ; Tokekar, S. ; Mishra, D.K.

  • Author_Institution
    Acropolis Inst. of Technol. & Res., Indore, India
  • fYear
    2009
  • fDate
    16-18 Dec. 2009
  • Firstpage
    346
  • Lastpage
    351
  • Abstract
    To overpass the speed gap between processor and main memory; cache memory is used. Cache memory is having hierarchical structure, including level 1 cache (L1), level 2 cache (L2) etc. Effective page replacement algorithm will result in effectual utilization of cache. L1 is having rich temporal locality while L2 is having poor temporal locality, thus same replacement algorithms for both the levels of cache may not be effective. We had concentrated to explore an appropriate pair of L1 and L2 replacement algorithms for the database access pattern. For obtaining the reference string of database a real trace of log4Net dashboard is taken from the site http://demo.l4ndash.com/PageDashboard/Dashboard.aspx. This paper has proposed a pair of replacement algorithms SeMFLRU and SeLF-LRU for L1 and L2 respectively. Through various experiments it has been analyzed that proposed pair of algorithms works better than existing replacement algorithms considered in this paper. During the process of page replacement another aspect comes in the mind for the security of individual database. To maintain the security of individual databases secured multiparty computation (SMC) is the best method. In this paper, we have used SMC to maintain the privacy of individual database on L2.
  • Keywords
    cache storage; data privacy; distributed databases; microprocessor chips; SeLF-LRU replacement algorithms; SeMFLRU replacement algorithms; cache memory; cache replacement algorithms; data privacy; database access pattern; databases secured multiparty computation; effective page replacement algorithm; level 1 cache; level 2 cache; processor; Algorithm design and analysis; Cache memory; Data engineering; Data privacy; Data security; Databases; Fast Fourier transforms; Sliding mode control; Sorting; Telecommunications;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Emerging Trends in Engineering and Technology (ICETET), 2009 2nd International Conference on
  • Conference_Location
    Nagpur
  • Print_ISBN
    978-1-4244-5250-7
  • Electronic_ISBN
    978-0-7695-3884-6
  • Type

    conf

  • DOI
    10.1109/ICETET.2009.16
  • Filename
    5395478