DocumentCode
3248847
Title
FPGA Implementation of Image Segmentation Processor
Author
Shanthi, J.K. ; Ashok, R.L. ; Anandu, S.A. ; Gokul Das, B.
Author_Institution
Dept. of Electron. & Commun. Eng., Univ. of Kerala, Trivandrum, India
fYear
2009
fDate
16-18 Dec. 2009
Firstpage
364
Lastpage
367
Abstract
Image segmentation is an important technique in the area of image processing with wide applications in medicine, remote sensing to mention a few. A lot of research work is in progress in various areas resulting in many computationally efficient algorithms. There are conventional as well as improvised segmentation algorithms depending on the application. The choice of the technique in most cases depends on the application and image in question rather than a generalised method. In this paper we used histogram for segmentation. The conventional histogram method is modified to adopt for automatically determining the threshold for different regions in the image. The objective of this paper is to realise the segmentation algorithm on a FPGA (Field Programmable Gate Array). The segmentation processor also has the capabilities to perform other tasks so that it could mimic an image processor. FPGA implementation renders it more useful for real time applications.
Keywords
field programmable gate arrays; image segmentation; logic design; pipeline processing; FPGA; field programmable gate array; histogram; image processing; image region threshold; image segmentation processor; pipeline architecture; processor design; Application software; Biomedical imaging; Computer architecture; Counting circuits; Feature extraction; Field programmable gate arrays; Histograms; Image processing; Image segmentation; Pixel;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Trends in Engineering and Technology (ICETET), 2009 2nd International Conference on
Conference_Location
Nagpur
Print_ISBN
978-1-4244-5250-7
Electronic_ISBN
978-0-7695-3884-6
Type
conf
DOI
10.1109/ICETET.2009.106
Filename
5395487
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