DocumentCode
3248908
Title
Algebraic error detection: a new approach to concurrent error detection in arithmetic circuits
Author
Evans, Richard A.
Author_Institution
Defence Res. Agency, Malvern, UK
fYear
1995
fDate
29 Aug-1 Sep 1995
Firstpage
717
Lastpage
722
Abstract
We present a novel and extremely simple technique for performing concurrent error detection in arithmetic circuits such as those used in Digital Signal Processing (DSP). Our approach, called Algebraic Error Detection, employs the well known concept of time redundancy, but exploits the algebraic properties of the number representation used within the circuit to permit errors to be detected. Within certain constraints, our approach appears to be capable of detecting all errors caused by single stuck-at faults, both permanent and transient, as well as many multiple faults, and may also be applicable to existing DSP chips. We also describe two hardware systems developed to demonstrate the idea
Keywords
VLSI; digital arithmetic; error detection; logic testing; Algebraic Error Detection; algebraic properties; arithmetic circuits; concurrent error detection; time redundancy; Circuit faults; Digital arithmetic; Digital signal processing; Digital signal processing chips; Electrical fault detection; Fault detection; Hardware; Redundancy; Signal processing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location
Chiba
Print_ISBN
4-930813-67-0
Type
conf
DOI
10.1109/ASPDAC.1995.486393
Filename
486393
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