An 8-bit 30 MS/s 18 mW ADC with 1.8 V single power supply

Author

Sigenobu, T. ; Ito, M. ; Miki, T.

Author_Institution

Syst. LSI Div., Mitsubishi Electr. Corp., Japan

fYear

2001

fDate

14-16 June 2001

Firstpage

209

Lastpage

210

Abstract

This paper describes an 8-bit 30 MS/s 18 mW ADC (Analog-to-Digital Converter) with 1.8 V single power supply for battery powered systems. A folding and interpolation architecture with the auto-zeroed amplifiers is newly developed to achieve the low power consumption and the low power supply voltage. A pipelining technique is also introduced to realize that conversion rate with low power consumption. A test chip of the ADC is fabricated in a 0.18 /spl mu/m CMOS process. The experimental results at 30 MS/s shows DNL less than +/$0.5 LSB, INL less than +/- 1.0 LSB and SNDR more than 45 dB with 3 MHz input frequency.

Keywords

CMOS integrated circuits; analogue-digital conversion; interpolation; low-power electronics; pipeline processing; 1.8 V; 18 mW; 8 bit; CMOS ADC; analog-to-digital converter; auto-zeroed amplifiers; battery powered systems; deep submicron CMOS process; folding/interpolation architecture; low power consumption; low power supply voltage; pipelining technique; single power supply; Analog-digital conversion; Batteries; CMOS process; Energy consumption; Frequency; Interpolation; Low voltage; Pipeline processing; Power supplies; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-89114-014-3

Type

conf

DOI

10.1109/VLSIC.2001.934241

Filename

934241