Title :
A 0.9-/spl mu/A standby current DSP core using improved ABC-MT-CMOS with charge pump circuit
Author :
Notani, H. ; Koyama, M. ; Mano, R. ; Makjno, H. ; Matsuda, Y.
Author_Institution :
Syst. LSI Dev. Center, Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
A 64-bit 80-MHz multimedia DSP core has been designed using 0.15-/spl mu/m CMOS technology. An improved Auto-Backgate-Controlled MT-CMOS (ABC-MT-CMOS) circuit with a charge pump is adopted to suppress the standby leakage current. The dynamic active current of the whole chip was simulated to optimize the size of the switch for the power supply control. The DSP core chip, which integrated 300 kgate logic, 64-kbyte SRAM and charge pump circuit, has only 0.9-/spl mu/A standby leakage current.
Keywords :
CMOS digital integrated circuits; digital signal processing chips; integrated circuit design; integrated circuit reliability; leakage currents; multimedia computing; 0.15 micron; 0.9 muA; 64 bit; 80 MHz; ABC-MT-CMOS; DSP core; SRAM; auto backgate control; charge pump circuit; dynamic active current; multimedia DSP; standby current; standby leakage current; CMOS technology; Charge pumps; Circuit simulation; Digital signal processing; Digital signal processing chips; Integrated circuit technology; Leakage current; Power supplies; Size control; Switches;
Conference_Titel :
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-014-3
DOI :
10.1109/VLSIC.2001.934246
