Silicon implementation of the generalized integrate-and-fire neuron model

In this paper we present the design, implementation and preliminary results from a silicon neuron (SiN) based on the generalized integrate-and-fire neuron model. The SiN is integrated onto a chip with a number of similar SiNs. In this paper we show the results from a single neuron, however, in the future it is our aim to show that real-time, low-power and highly configurable spiking neural networks are feasible on silicon chips.