DocumentCode :
3251520
Title :
Design of asynchronous circuit primitives using MOS current-mode logic (MCML)
Author :
Kwan, Tin Wai ; Shams, Maitham
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
fYear :
2004
fDate :
6-8 Dec. 2004
Firstpage :
170
Lastpage :
173
Abstract :
This paper introduces and compares two topologies for the C-element in MCML and two topologies for double-edge-triggered flip-flop in MCML. Based on the simulation results, an asynchronous MCML C-element dissipates four times less power than conventional static CMOS C-element at the same throughout of 1.9 GHz. Also, MCML double-edge-triggered flip-flop runs up to three times faster than the conventional static CMOS counterpart at the same power level. All the circuits are implemented in a standard 0.18 μm CMOS technology.
Keywords :
CMOS logic circuits; asynchronous circuits; current-mode logic; flip-flops; logic design; low-power electronics; network topology; 0.18 micron; 1.9 GHz; CMOS technology; asynchronous MOS current mode logic; asynchronous circuit design; circuit topology; double edge triggered flip flop; power dissipation; Asynchronous circuits; Circuit noise; Circuit topology; Clocks; Delay; Logic circuits; Logic design; Pipeline processing; Power dissipation; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN :
0-7803-8656-6
Type :
conf
DOI :
10.1109/ICM.2004.1434236
Filename :
1434236
Link To Document :
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