Title :
Novel bi-directional tunneling NOR (BiNOR) type 3-D flash memory cell
Author :
Yang, E.C.-S. ; Cheng-Jye Liu ; Tien-Sheng Chao ; Ming-Chi Liaw ; Hsu, C.C.-H.
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
A novel 3D flash memory, BiNOR, with a localized shallow P-well is proposed for high speed, low power and high reliability applications. Low power bi-directional tunneling program/erase is realized in a NOR array, which guarantees better tunnel oxide reliability, where previously bi-directional tunneling program/erase could only be performed in NAND arrays. Moreover, high read performance is achieved by more than 15% conduction current enhancement due to the 3D cell structure.
Keywords :
NOR circuits; dielectric thin films; electric current; flash memories; high-speed integrated circuits; integrated circuit measurement; integrated circuit reliability; integrated memory circuits; logic arrays; low-power electronics; tunnelling; 3D cell structure; 3D flash memory; BiNOR type 3D flash memory cell; NAND arrays; NOR array; SiO/sub 2/-Si; bi-directional tunneling NOR type 3D flash memory cell; bi-directional tunneling program/erase; conduction current enhancement; high reliability applications; high speed applications; localized shallow P-well; low power applications; read performance; tunnel oxide reliability; Bidirectional control; Energy consumption; Flash memory; Flash memory cells; Hot carriers; Paper technology; Surface charging; Transconductance; Tunneling; Voltage;
Conference_Titel :
VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-93-X
DOI :
10.1109/VLSIT.1999.799352
