Title :
Efficient implementations of S-box and inverse S-box for AES algorithm
Author :
Rachh, Rashmi Ramesh ; Anami, B.S. ; Ananda Mohan, P.V.
Author_Institution :
Dept. of Comput. Sci., KLE Coll. of Eng. & Technol., Belgaum, India
Abstract :
In this paper, improved architectures are proposed for implementation of S-Box and inverse S-Box needed in the Advanced encryption standard (AES) algorithm. These use combinational logic only for implementing SubByte (S-box) and InvSubByte (Inverse S-box). The composite field arithmetic used for implementing S-Box in lower-order Galois field (GF) investigated by several authors recently is used as the basis for deriving the proposed architectures. The resulting hardware requirements as well computation time are presented for the proposed designs and compared with previous work.
Keywords :
cryptography; formal logic; AES algorithm; Galois field; S-box; advanced encryption standard; combinational logic; composite field arithmetic; inverse S-box; Computer architecture; Computer science; Cryptography; Delay; Galois fields; Hardware; Iterative algorithms; Logic; Read only memory; Very large scale integration; AES; Data Encryption; Inverse S-Box; S-Box; VLSI architectures;
Conference_Titel :
TENCON 2009 - 2009 IEEE Region 10 Conference
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-4546-2
Electronic_ISBN :
978-1-4244-4547-9
DOI :
10.1109/TENCON.2009.5395837
