• DocumentCode
    3251711
  • Title

    A novel noise transfer function for high order reduced-sample-rate delta-sigma-pipeline ADCs

  • Author

    Majidzadeh, V. ; Shoaei, O.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Tehran Univ., Iran
  • fYear
    2005
  • fDate
    7-10 Aug. 2005
  • Firstpage
    531
  • Abstract
    A novel noise transfer function (NTF) for high order reduced-sample-rate mixed-delta-sigma-pipeline ADCs is presented. The proposed NTF determines the location of the non-zero poles improving the stabilization of the loop and implementing reduced-sample-rate architecture, concurrently. A design methodology based on simulated-annealing-algorithm is developed to design the optimum NTF. To verify the usefulness of the proposed NTF and design procedure, two different modulators are introduced. Simulation results show that with a 4th order modulator, designed making use of the proposed approach, the maximum SNDR of 114.9dB and 122.5dB can be achieved with only OSR of 8, and 16 respectively.
  • Keywords
    analogue-digital conversion; delta-sigma modulation; poles and zeros; simulated annealing; transfer functions; 4th order modulator; analog-to-digital converter; high order delta-sigma-pipeline ADC; loop stabilization; noise transfer function; nonzero poles; reduced-sample-rate architecture; reduced-sample-rate delta-sigma-pipeline ADC; simulated-annealing-algorithm; Analog circuits; Degradation; Design methodology; Filters; Integrated circuit noise; Noise reduction; Noise shaping; Poles and zeros; Sampling methods; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. 48th Midwest Symposium on
  • Print_ISBN
    0-7803-9197-7
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2005.1594155
  • Filename
    1594155