Title :
In-situ multi-step (IMS) CVD process of (Ba,Sr)TiO/sub 3/ using hot wall batch type reactor for DRAM capacitor dielectrics
Author :
Kiyotoshi, M. ; Yamazaki, S. ; Eguchi, K. ; Hieda, K. ; Fukuzumi, Y. ; Izuha, M. ; Aoyama, T. ; Niwa, S. ; Nakamura, K. ; Kojima, A. ; Tomita, H. ; Kubota, T. ; Satoh, M. ; Kohyama, Y. ; Tsunashima, Y. ; Arikado, T. ; Okumura, K.
Author_Institution :
Microelectron. Eng. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
We developed a new in-situ multi-step (IMS) process technology to achieve both conformal step coverage and high dielectric constant for CVD-BST. IMS is a sequential repetition of low temperature CVD of BST and its crystallization in a batch type hot wall reactor that enables uniform BST deposition over 200 mm wafers. Conformal growth of local epitaxially grown BST with a dielectric constant of more than 300 is attained by IMS combined with SrRuO/sub 3/ electrodes.
Keywords :
DRAM chips; MIS capacitors; batch processing (industrial); chemical vapour deposition; crystallisation; dielectric thin films; electrodes; permittivity; (Ba,Sr)TiO/sub 3/ DRAM capacitor dielectrics; (BaSr)TiO/sub 3/-SrRuO/sub 3/; 200 mm; CVD-BST; DRAM capacitor dielectrics; IMS CVD process; SrRuO/sub 3/ electrodes; batch type hot wall reactor; conformal growth; conformal step coverage; crystallization; dielectric constant; hot wall batch type reactor; in-situ multi-step CVD process; in-situ multi-step process technology; local epitaxially grown BST; sequential low temperature CVD repetition; uniform BST deposition; Amorphous materials; Binary search trees; Capacitors; Crystallization; Dielectric constant; Electrodes; High-K gate dielectrics; Inductors; Random access memory; Temperature;
Conference_Titel :
VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-93-X
DOI :
10.1109/VLSIT.1999.799360
