DocumentCode :
3251960
Title :
FPGA based Smart Card reader
Author :
Mandi, Bipin Chandra ; Venkateswaran, P. ; Nandi, R.
Author_Institution :
Dept. of Electron. & Tele-Commun. Eng., Jadavpur Univ., Kolkata, India
fYear :
2011
fDate :
26-28 Dec. 2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper describes about the Implementation and Simulation of a Smart Card Reader design with a XC2VP4-6FG256 device in FPGA Xilinx kit. The Comparison among CPLD, Virtex and Altera is explained based on area and time requirement. Different from most of the software-based Smart Card reader computer systems, this XC2VP4-6FG256 based Smart Card reader implementation is a hardware solution. There is no requirement of software development in this design. This paper explains the low-level protocol of the FPGA based Smart Card Reader and its implementation.
Keywords :
field programmable gate arrays; microprocessor chips; smart cards; Altera; CPLD; FPGA Xilinx kit; Virtex; XC2VP4-6FG256 device; simulation; smart card reader; Computers; Field programmable gate arrays; ISO standards; Programming; Protocols; Random access memory; Smart cards; FPGA; ISO 7816; SMART CARD; T=0; XC2VP4-6FG256;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication and Industrial Application (ICCIA), 2011 International Conference on
Conference_Location :
Kolkata, West Bengal
Print_ISBN :
978-1-4577-1915-8
Type :
conf
DOI :
10.1109/ICCIndA.2011.6146692
Filename :
6146692
Link To Document :
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