Title :
Device and reliability of high-k Al/sub 2/O/sub 3/ gate dielectric with good mobility and low D/sub it/
Author :
Chin, A. ; Liao, C.C. ; Lu, C.H. ; Chen, W.J. ; Tsai, C.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
We report a very simple process to fabricate Al/sub 2/O/sub 3/ gate dielectric for CMOS technology with k (9.0 to 9.8) greater than Si/sub 3/N/sub 4/. Al/sub 2/O/sub 3/ is formed by direct oxidation from thermally evaporated Al. The 48 /spl Aring/ Al/sub 2/O/sub 3/ has /spl sim/7 orders lower leakage current than equivalent 21 /spl Aring/ SiO/sub 2/. A good Al/sub 2/O/sub 3/-Si interface was evidenced by the low interface density of 1/spl times/10/sup 11/ eVcm/sup -2/ and compatible electron mobility with thermal SiO/sub 2/. Good reliability is measured from the small stress induced leakage current (SILC) after 2.5 V stress for 10,000 s.
Keywords :
CMOS integrated circuits; alumina; dielectric thin films; electron mobility; electron traps; integrated circuit reliability; interface states; interface structure; leakage currents; oxidation; permittivity; 10000 s; 2.5 V; 21 angstrom; 48 angstrom; Al; Al/sub 2/O/sub 3/ direct oxidation; Al/sub 2/O/sub 3/ gate dielectric fabrication; Al/sub 2/O/sub 3/-Si; Al/sub 2/O/sub 3/-Si interface; CMOS technology; SILC; Si/sub 3/N/sub 4/; SiO/sub 2/; carrier mobility; electrical stress; electron mobility; high-k Al/sub 2/O/sub 3/ gate dielectric; interface density; interface trap density; leakage current; reliability; stress induced leakage current; thermal SiO/sub 2/; thermally evaporated Al; CMOS process; CMOS technology; Current measurement; Electron mobility; High K dielectric materials; High-K gate dielectrics; Leakage current; Oxidation; Stress measurement; Thermal stresses;
Conference_Titel :
VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-93-X
DOI :
10.1109/VLSIT.1999.799380
