A new 1T/2C merged two-terminal gain cell with SBT encapsulated floating gate MOSFET for highly scalable FeRAM

We fabricated a new scalable gain cell that consists of one transistor (1T) and two ferroelectric capacitors (2C), and can select one individual cell using only two wires. The cell features an encapsulated floating gate MOSFET using SBT film and overlapped capacitors between the wire and the gate, thereby enabling simple high-level integration applicable for Gbit FeRAM. The fabricated prototype devices exhibit successful operation. The cell can write data at 5 V and read data at 2 V nondestructively, and retain data for 5000 s.