DocumentCode
3252187
Title
A 0.85 V CMOS low-noise amplifier design for 5 GHz RF applications
Author
Khan, M. Zamin ; Wang, Yanjie ; Raut, R.
Author_Institution
Victhom Human Bionics, Saint-Augustin-de-Desmaures, Que.
fYear
2005
fDate
7-10 Aug. 2005
Firstpage
635
Abstract
A 0.85 V, 5 GHz low noise amplifier (LNA) has been designed, laid out and simulated using Spectre simulator in a standard TSMC 0.18 mum CMOS technology. The proposed cascode LNA achieves a gain of 20 dB, a noise figure of 1.6 dB, power dissipation of 3 mW from a 0.85 V power supply
Keywords
CMOS analogue integrated circuits; integrated circuit design; low noise amplifiers; microwave amplifiers; microwave integrated circuits; 0.18 micron; 0.85 V; 1.6 dB; 20 dB; 3 mW; 5 GHz; CMOS amplifier; RF integrated circuit; Spectre circuit simulator; low noise amplifier; Circuit noise; Immune system; Impedance matching; Low-noise amplifiers; MOS devices; Noise figure; Noise generators; Radio frequency; Signal to noise ratio; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location
Covington, KY
Print_ISBN
0-7803-9197-7
Type
conf
DOI
10.1109/MWSCAS.2005.1594181
Filename
1594181
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