Title :
Submicron CMOS thermal noise modeling from an RF perspective
Author :
Ou, J.J. ; Xiaodong Jin ; Chenming Hu ; Gray, P.R.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
Continuous scaling of submicron CMOS technologies will soon make low cost, wireless system-on-a-chip communication products possible. The ultimate goal of these systems is to integrate the entire RF front-end with DSP together on a single chip. One key issue to the success of this CMOS RF system LSI chip implementation is how to accurately predict circuit performance using simulators such as SPICE. This will require accurate RF AC and noise models. The latter is essential for optimizing the noise performance which will in turn lead to a low power design. Recently, several CMOS RF models have been proposed for improvement on the accuracy of AC analysis at high frequencies (Ou et al, 1998). However, the accuracy of the existing noise models is not satisfactory for submicron CMOS. In this paper, a physics-based RF thermal noise model is proposed for submicron CMOS devices with a channel thermal noise model, resulting in a nearly bias-independent noise factor /spl gamma/. This model shows good agreement with measured RF noise data across a wide range of bias conditions.
Keywords :
CMOS integrated circuits; SPICE; circuit optimisation; circuit simulation; field effect MMIC; integrated circuit measurement; integrated circuit modelling; integrated circuit noise; large scale integration; low-power electronics; microprocessor chips; thermal noise; AC analysis; CMOS RF models; CMOS RF system LSI chip implementation; CMOS devices; CMOS technology scaling; CMOS thermal noise modeling; DSP; RF AC models; RF front-end integration; RF noise data; RF noise models; RF perspective; SPICE; bias conditions; channel thermal noise model; circuit performance; circuit simulators; low power design; nearly bias-independent noise factor; noise models; noise performance optimization; physics-based RF thermal noise model; wireless system-on-a-chip communication products; CMOS technology; Circuit noise; Costs; Digital signal processing chips; Power system modeling; Radio frequency; Semiconductor device modeling; System-on-a-chip; Thermal factors; Wireless communication;
Conference_Titel :
VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-93-X
DOI :
10.1109/VLSIT.1999.799388