Title :
A very low voltage design for different CMOS low-noise amplifier topologies at 5 GHz
Author :
Wang, Yanjie ; Khan, M. Zamin
Author_Institution :
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta.
Abstract :
A very low-voltage design for two different low noise amplifier (LNA) topologies at 5 GHz has been designed, laid out and simulated using Spectre simulator in a standard TSMC 0.18 mum CMOS technology. The proposed LNA topology achieves better performance than conventional cascode topology and are confirmed by simulation results. The LNA provides a high gain of 20 dB, a noise figure of 1.4 dB, power dissipation of 1.9 mW from a 0.65 V power supply. To the best of author´s knowledge this is the lowest voltage supply CMOS LNA design reported to date
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; circuit simulation; integrated circuit design; low noise amplifiers; low-power electronics; 0.18 micron; 0.65 V; 1.4 dB; 1.9 mW; 20 dB; 5 GHz; CMOS low noise amplifier; LNA topology; Spectre simulator; TSMC CMOS technology; cascode topology; integrated circuit design; low voltage amplifer; Diodes; Impedance matching; Inductance; Low voltage; Low-noise amplifiers; MOSFETs; Power supplies; Resistors; Threshold voltage; Topology;
Conference_Titel :
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location :
Covington, KY
Print_ISBN :
0-7803-9197-7
DOI :
10.1109/MWSCAS.2005.1594183
