Scalable Architecture of MIMO Multi-carrier CDMA System on Programmable Logic

Author

Guo, Yuanbin ; Cavallaro, Joseph R.

Author_Institution

Nokia Siemens Networks, Irving

fYear

2007

fDate

4-7 Nov. 2007

Firstpage

1976

Lastpage

1980

Abstract

In this paper, a scalable architecture of the multi-carrier CDMA system using multiple-input-multiple-output (MIMO) technology is designed in the programmable logic array. The system-level partitioning with different architecture design entries is described. The overall computing architecture for complex signal processing blocks, e.g., channel estimation, frequency domain equalization, demodulation etc is described. The MIMO architecture is easily extended from a SISO system with single antenna. This scalable architecture demonstrates resource utilization efficiency and easy extension to MIMO configurations.

Keywords

MIMO systems; antenna arrays; channel estimation; code division multiple access; demodulation; programmable logic arrays; signal processing; MIMO architecture; MIMO multicarrier CDMA system; SISO system; architecture design; channel estimation; demodulation; frequency domain equalization; multiple-input-multiple-output technology; programmable logic array; resource utilization efficiency; scalable architecture; signal processing blocks; single antenna; system-level partitioning; Array signal processing; Channel estimation; Computer architecture; Demodulation; Frequency domain analysis; Logic design; MIMO; Multiaccess communication; Programmable logic arrays; Programmable logic devices;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

978-1-4244-2109-1

Electronic_ISBN

1058-6393

Type

conf

DOI

10.1109/ACSSC.2007.4487582

Filename

4487582