Defect-Free Epitaxial Lateral Overgrowth (ELO) Technique For Future Generation Low Power CMOSFETs

Author

Tsuchiya, R. ; Kimura, Y. ; Morita, Y. ; Kimura, S. ; Hirasawa, T. ; Inui, K. ; Iwamatsu, Takanori ; Ipposhi, Takashi ; Kondo, Y. ; Sakata, T. ; Inoue, Y.

Author_Institution

Renesas Technol. Corp., Hyogo

fYear

2006

fDate

2-5 Oct. 2006

Firstpage

57

Lastpage

58

Abstract

The authors have demonstrated a new technique that enables defect-free SGE/ELO silicon layer fabrication by using in-situ HCl etch and H₂ anneal planarization. This is significant, as now defect-free SEG/ELO silicon techniques can be used for the fabrication of low-power and high performance CMOSFETs technology with ultra-thin body/BOX layers

Keywords

MOSFET; annealing; epitaxial growth; hydrogen; low-power electronics; semiconductor epitaxial layers; sputter etching; BOX layers; H₂; HCl; defect-free epitaxial lateral overgrowth; hydrogen anneal planarization; in-situ chemical etching; low power CMOSFET; silicon layer fabrication; ultra-thin body; CMOS technology; CMOSFETs; Conference proceedings; MOSFET circuits; Planarization; Power generation; Silicon on insulator technology; Stacking; Thermal stresses; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

International SOI Conference, 2006 IEEE

Conference_Location

Niagara Falls, NY

ISSN

1078-621X

Print_ISBN

1-4244-0289-1

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2006.284431

Filename

4062879