Title :
Defect-Free Epitaxial Lateral Overgrowth (ELO) Technique For Future Generation Low Power CMOSFETs
Author :
Tsuchiya, R. ; Kimura, Y. ; Morita, Y. ; Kimura, S. ; Hirasawa, T. ; Inui, K. ; Iwamatsu, Takanori ; Ipposhi, Takashi ; Kondo, Y. ; Sakata, T. ; Inoue, Y.
Author_Institution :
Renesas Technol. Corp., Hyogo
Abstract :
The authors have demonstrated a new technique that enables defect-free SGE/ELO silicon layer fabrication by using in-situ HCl etch and H2 anneal planarization. This is significant, as now defect-free SEG/ELO silicon techniques can be used for the fabrication of low-power and high performance CMOSFETs technology with ultra-thin body/BOX layers
Keywords :
MOSFET; annealing; epitaxial growth; hydrogen; low-power electronics; semiconductor epitaxial layers; sputter etching; BOX layers; H2; HCl; defect-free epitaxial lateral overgrowth; hydrogen anneal planarization; in-situ chemical etching; low power CMOSFET; silicon layer fabrication; ultra-thin body; CMOS technology; CMOSFETs; Conference proceedings; MOSFET circuits; Planarization; Power generation; Silicon on insulator technology; Stacking; Thermal stresses; Threshold voltage;
Conference_Titel :
International SOI Conference, 2006 IEEE
Conference_Location :
Niagara Falls, NY
Print_ISBN :
1-4244-0289-1
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2006.284431
