ATM and its challenges to VLSI

The author introduces the asynchronous transfer mode as a new challenging network technique which offers a lot of flexibility for all existing and forthcoming narrowband and broadband applications. Although the concepts have already found broad acceptance, doubt has been expressed about the realization possibilities due to the high-speed high-complexity circuitry involved. Therefore, some key components required for ATM implementations are described, with emphasis on their VLSI aspects. From the basic network-node functionality at least two key components can be deduced: moderate-speed RAMs on the order of 1 to 2 Mb and elastic buffers on the order of 3 to 30 kb with throughput rates ranging from 600 Mb/s to 10 Gb/s