DocumentCode :
3253087
Title :
Verifying firewall circuits by wave-pipelined operations
Author :
Sato, Tomoaki ; Imaruoka, Syuya ; Fukase, Masa-aki
Author_Institution :
C&C Syst. Center, Hirosaki Univ., Hirosaki, Japan
fYear :
2009
fDate :
23-26 Jan. 2009
Firstpage :
1
Lastpage :
6
Abstract :
H-HIPS (Hardware- and Host-Based Intrusion Prevention System) is an IPS that can be used on UMPC (Ultra-Mobile PC) or PDA (Personal Digital Assistant). Because it has been achieved by using a FPGA (Field Programmable Gate Array), the use of the hardware resource for intrusion detections is limited. Additionally, the operation of low power consumption is very important. In this paper, a firewall unit by wave-pipelined operations is described. The firewall unit is used for port filtering and power control of IDL (Intrusion Detection Logic) on H-HIPS. The wave-pipelined operations and the performance of the firewall unit are evaluated by using a logic analyzer. The domination of power consumption by wave-pipelining is described.
Keywords :
authorisation; computer networks; field programmable gate arrays; mobile computing; field programmable gate array; firewall circuits; hardware-based intrusion prevention system; host-based intrusion prevention system; intrusion detection logic; logic analyzer; low power consumption operation; wave-pipeline operation; Circuits; Energy consumption; Field programmable gate arrays; Filtering; Hardware; Intrusion detection; Personal digital assistants; Power control; Power filters; Programmable logic arrays; FPGA; Firewall; IPS; Wave-Pipeline;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2009 - 2009 IEEE Region 10 Conference
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-4546-2
Electronic_ISBN :
978-1-4244-4547-9
Type :
conf
DOI :
10.1109/TENCON.2009.5395900
Filename :
5395900
Link To Document :
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