DocumentCode
3253324
Title
A high performance processor for real-time ray-tracing image rendering
Author
Poz, Marco Antonio Simon Dal ; Gnecco, Bruno Barberi ; Zuffo, Marcelo Knorich
Author_Institution
Lab. of Integrated Syst., Univ. of Sao Paulo
fYear
2005
fDate
7-10 Aug. 2005
Firstpage
867
Abstract
In this paper we propose a programmable hardware architecture for real-time ray tracing, which can be programmed with arbitrary ray-object intersection tests, thus taking advantage of ray tracing´s well known flexibility and potential Ray-object intersection calculations require 3D vectors and the usual linear algebra operations. Many of the algorithms also require branching, and looping through data; a Turing-complete processor is necessary to support any type of primitive. This processor is called ROIP (Ray-Object Intersection Processor), designed to calculate ray-object intersections. Today´s rasterization Graphic Processing Units still do not allow new triangles to be created by shaders, which is a severe limitation. Another common complaint is the lack of support for higher-order surfaces and other more general objects. With ROIP these problems are solved, as the program running on it has freedom to modify the object data as it pleases and use sophisticated models instead of triangles
Keywords
linear algebra; microcomputers; programmable circuits; ray tracing; rendering (computer graphics); 3D vector; Turing-complete processor; graphic processing unit; high performance processor; image rendering; linear algebra operation; programmable hardware architecture; ray-object intersection processor; real-time ray-tracing; Field programmable gate arrays; Graphics; Hardware; Linear algebra; Ray tracing; Registers; Rendering (computer graphics); Silicon; Testing; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location
Covington, KY
Print_ISBN
0-7803-9197-7
Type
conf
DOI
10.1109/MWSCAS.2005.1594239
Filename
1594239
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