Title :
Nanoscale CMOS at low temperature: design, reliability, and scaling trend
Author :
Bin Yu ; Wang, Haihong ; Riccobene, Concetta ; Kim, Hyeon-Seag ; Xiang, Qi ; Lin, Ming-Ren ; Chang, Leland ; Hu, Chenming
Author_Institution :
Strategic Technol. Group, Adv. Micro Devices Inc., Sunnyvale, CA, USA
Abstract :
The semiconductor industry is not motivated to make practical use of cryogenic operation as long as IC performance could be improved at room temperature. However, as CMOS approaches the scaling limits, cooled chip operation becomes an attractive alternative. This paper explores the feasibility of IC temperature "scaling" and its implications to device performance and reliability for sub-50 nm CMOS generations
Keywords :
CMOS integrated circuits; cryogenic electronics; integrated circuit design; integrated circuit reliability; integrated circuit technology; nanotechnology; 50 nm; design; device scaling; low temperature operation; nanoscale CMOS IC technology; reliability; CMOS technology; Degradation; Electron mobility; Hot carriers; Impact ionization; Implants; Integrated circuit reliability; Integrated circuit technology; MOSFET circuits; Temperature dependence;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
0-7803-6412-0
DOI :
10.1109/VTSA.2001.934473
