Design and implementation of a routing switch for irregular interconnection networks

Author

Chi, Hsin-Chou ; Wu, Chia-Ming

Author_Institution

Dept. of Comput. Sci. & Inf. Eng., Nat. Dong Hwa Univ., Shoufeng, Taiwan

fYear

2001

fDate

2001

Firstpage

73

Lastpage

76

Abstract

We present the design and implementation of a routing switch for irregular interconnection networks, which can be used to construct workstation clusters. A routing architecture we previously proposed for irregular interconnection networks, called TRAIN (tree-based routing architecture for irregular networks), is described. The VLSI implementation of a switch design for TRAIN is then presented

Keywords

VLSI; multiprocessor interconnection networks; packet switching; workstation clusters; MIN; TRAIN; irregular interconnection networks; multiprocessor interconnection networks; routing architecture; routing switch; switch design; tree-based routing architecture for irregular networks; workstation clusters; Communication switching; Computer networks; Concurrent computing; Multiprocessor interconnection networks; Network topology; Packet switching; Routing; Switches; Very large scale integration; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

0-7803-6412-0

Type

conf

DOI

10.1109/VTSA.2001.934486

Filename

934486