Title :
A 30-mW 8-b 125-MS/s pipelined ADC in 0.13-/spl mu/m CMOS
Author :
Heedley, Perry L. ; Dyer, Kenneth C. ; Matthews, Thomas W. ; Isakanian, Patrick ; Thanh, Chuc
Author_Institution :
Dept. of Electr. & Electron. Eng., California State Univ., Sacramento, CA
Abstract :
An 8-b pipelined ADC constructed in 0.13-mum CMOS is described. This ADC uses a dual-supply technique to yield 8-b performance at a sampling rate of 125MS/s while consuming 30mW from 1.8-V and 1.2-V supplies. Active area is 0.4mm2
Keywords :
CMOS integrated circuits; analogue-digital conversion; power supply circuits; 0.13 micron; 1.2 V; 1.8 V; 30 mW; CMOS technology; dual-supply technique; pipelined ADC; Bandwidth; Capacitors; Circuit topology; Clocks; Copper; Decoding; Feedback; Fingers; Sampling methods; Switches;
Conference_Titel :
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location :
Covington, KY
Print_ISBN :
0-7803-9197-7
DOI :
10.1109/MWSCAS.2005.1594273