Title :
DSP implementation issues in 1000BASE-T Gigabit Ethernet
Author :
Azadet, Kamran ; Haratsch, Erich
Author_Institution :
VLSI Res. Dept., Bell Labs., Holmdel, NJ, USA
Abstract :
This is the second part of a tutorial on 1000BASE-T, physical layer of Gigabit Ethernet over copper. A general presentation of the 1000BASE-T standard was given in a previous communication [Azadet, 1999]. In this paper we focus on one of the main challenges in Gigabit Ethernet: DSP implementation. After presenting a reference implementation of the receiver we describe low-power digital adaptive filter architectures, and techniques for combining Viterbi and Decision Feedback Equalizers (DFE). The last section studies the critical path and complexity of the joint Viterbi/DFE decoder
Keywords :
Viterbi detection; adaptive filters; decision feedback equalisers; digital filters; local area networks; low-power electronics; 1000BASE-T Gigabit Ethernet; DSP implementation issues; Viterbi equalizers; critical path; decision feedback equalizers; low-power digital adaptive filter architectures; Adaptive filters; Convergence; Decision feedback equalizers; Digital signal processing; Error correction; Ethernet networks; Least squares approximation; Monitoring; Physical layer; Viterbi algorithm;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
0-7803-6412-0
DOI :
10.1109/VTSA.2001.934495
