Title :
A Novel Mini-LVDS Receiver in 0.35-um CMOS
Author :
Chen, Chung-Yuan ; Wang, Jia-Hong ; Sun, Tai-Ping
Author_Institution :
Dept. of Electr. Eng., Nat. Chi Nan Univ., Puli
Abstract :
This paper presents the design of receiver circuits for flat-plane application. Due to the differential transmission technique and the low voltage swing, mini-LVDS (low-voltage differential signaling) allows high transmission speeds and low power consumption at the same time. In the proposed receiver, high transmission speed with the minimum common-mode and differential voltage at the input for mini-LVDS application was achieved. The circuit was designed in a 3.3-V 0.35- mum CMOS technology, and the transmission operations is more than 500 Mb/s with random data patterns. The total power consumption is 3.5 mW.
Keywords :
CMOS integrated circuits; receivers; CMOS technology; differential transmission technique; flat-plane application; low voltage swing; low-voltage differential signaling; mini-LVDS receiver; power 3.5 mW; receiver circuits; size 0.35 mum; voltage 3.3 V; CMOS technology; Circuits; Clocks; Costs; Energy consumption; Frequency; Hysteresis; Intersymbol interference; Low voltage; Packaging;
Conference_Titel :
SOC Conference, 2006 IEEE International
Conference_Location :
Taipei
Print_ISBN :
0-7803-9781-9
Electronic_ISBN :
0-7803-9782-7
DOI :
10.1109/SOCC.2006.283845
