Title :
Real time implementation of pruned tree search vector quantization
Author :
Madisetti, Avanindra ; Jain, Rajeev ; Baker, Richard L.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
Discusses the design of a CMOS integrated circuit for real time vector quantization (VQ) of images at MPEG rates. It has been designed as a slave processor which can implement binary, non-binary, and pruned tree search VQ algorithms. Inputs include the image source vectors, the VQ codevectors and external control signals that direct the search. The chip outputs the index of the codevector that best approximates the input in a mean square error sense. The layout has been generated using a 1.2 mu CMOS library and measures 5.76*6.6 mm/sup 2/. Critical path simulation with SPICE indicates a maximum clock rate of 40 MHz.<>
Keywords :
CMOS integrated circuits; digital signal processing chips; image coding; vector quantisation; 1.2 micron; 1.2 mu CMOS library; 40 MHz; CMOS integrated circuit; MPEG rates; SPICE; VQ; binary VQ algorithms; codevector; critical path simulation; image source vectors; index; layout; maximum clock rate; mean square error; nonbinary VQ algorithm; pruned tree search vector quantization; real time vector quantization; slave processor; Algorithm design and analysis; CMOS integrated circuits; Computational complexity; Decoding; Discrete cosine transforms; Laboratories; Real time systems; Vector quantization; Video compression; Videoconference;
Conference_Titel :
Data Compression Conference, 1992. DCC '92.
Conference_Location :
Snowbird, UT, USA
Print_ISBN :
0-8186-2717-4
DOI :
10.1109/DCC.1992.227466
