High quality factor silicon-integrated spiral inductors achieved by using thick top metal with different passivation schemes

Author

Chu, Shao-Fu ; Chew, K.W. ; Loh, W.B. ; Wang, Y.M. ; Onn, B.G. ; Ju, Y. ; Zhang, J. ; Shao, K.

Author_Institution

Chartered Semicond. Manuf. Ltd., Singapore

fYear

2001

fDate

2001

Firstpage

154

Lastpage

157

Abstract

A novel approach combining 2 μm thick top metal, stacked design and different passivation schemes has been adopted to realize high quality factor (Q) inductors fabricated using a conventional 0.25 μm 5-level metal CMOS technology. Q-factor enhancement of greater than 50% at 2.45 GHz has been achieved. It has been found that the passivation scheme utilizing 17 kÅ of high density plasma (HDP) oxide is most effective in boosting the Q-factor. The above highlighted techniques can be easily implemented in any standard CMOS technology without additional increase in cost to the end-users

Keywords

CMOS integrated circuits; Q-factor; UHF integrated circuits; elemental semiconductors; inductors; integrated circuit metallisation; passivation; silicon; 0.25 micron; 2.45 GHz; Q-factor enhancement; RFIC; Si; Si integrated spiral inductors; five-level metal CMOS technology; high density plasma oxide; high quality factor inductors; high-Q inductors; passivation schemes; stacked design; thick top metal layer; CMOS technology; Coils; Inductors; Passivation; Q factor; Silicon compounds; Spirals; Substrates; Testing; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

0-7803-6412-0

Type

conf

DOI

10.1109/VTSA.2001.934506

Filename

934506