DocumentCode
3254311
Title
A systolic array architecture for 2-D inverse wavelet transform
Author
Singh, J. ; Antoniou, A. ; Shpak, D.J.
Author_Institution
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
fYear
1999
fDate
1999
Firstpage
193
Lastpage
196
Abstract
A systolic array architecture for computing the 2-D inverse discrete wavelet transform is proposed. The architecture is derived by performing a thorough data dependence and localization analysis for the 2-D inverse discrete wavelet transform. The design is modular, and can easily be scaled for different levels of wavelet decomposition and filter lengths. The derived architecture for an 8×8 image has been functionally verified by coding the design in VHDL and simulating it using Mentor Graphics
Keywords
discrete wavelet transforms; image coding; systolic arrays; transform coding; two-dimensional digital filters; 2D inverse discrete wavelet transform; DWT; Mentor Graphics; VHDL; data dependence analysis; filter lengths; image coding; localization analysis; modular design; systolic array architecture; wavelet decomposition; Computer architecture; Discrete wavelet transforms; Equations; Filters; Image coding; Performance analysis; Pipeline processing; Systolic arrays; Wavelet analysis; Wavelet transforms;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
0-7803-5582-2
Type
conf
DOI
10.1109/PACRIM.1999.799510
Filename
799510
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