Analysis of Subthreshold Finfet Circuits for Ultra-Low Power Design

In this paper, we first explore sub-threshold Fin-FET circuits design space, finding their optimal power supply point for minimum energy consumption. We then study soft error vulnerability in sub-threshold region. Our experiments indicate that the energy consumption in sub-threshold region can achieve 4 orders of magnitude energy saving. Compared to bulk CMOS technology, FinFET circuits have lower functional power supply and lower optimal energy consumption in subthreshold region. In addition, FinFET has better soft error immunity in sub-threshold region.