A high performance and low cost real-time address tracer for embedded microprocessors

A real-time address tracer provides designers a realtime monitoring capability, which is the kernel of a dynamic debugging system. Due to the limited trace memory; the address data should be compressed before storing into trace memory. According to the localities of programs, we provide an effective compression method, which usually uses only 8 to 16 entries (64 bits each entry) of table instead of 0.5k to 4k entries of dictionary and window used by LZW-based compression method. Furthermore, by associating a simple counter and low cost hardware, for several benchmarks, the average compression ratio reaches more than 99.9% (1:1000), ten folds improvement comparing with other work. The system has been implemented using Xilinx FPGA