DocumentCode :
3254586
Title :
New stack gate insulator structure strongly reduces FIBL effect
Author :
Lai, Chen-Hsiao ; Hu, Ling-Chang ; Lee, Hai-Ming ; Do, Long-Je ; King, Ya-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2001
fDate :
2001
Firstpage :
216
Lastpage :
219
Abstract :
Recent studies have shown that by adapting high-k gate dielectric, deep sub-micron MOSFET suffers short channel effect caused by the fringing electric fields from gate to source/drain regions. In this work, a simulation-based analysis of multiple gate stack structure with channel length as low as 50 nm is presented. The new stack gate structure can be optimized for reducing the undesirable fringing induced barrier lowering effect of a high-k gate dielectric device
Keywords :
MOSFET; dielectric thin films; leakage currents; permittivity; semiconductor device models; 50 nm; FIBL effect; channel length; deep sub-micron MOSFET; fringing electric fields; fringing induced barrier lowering effect; high-k gate dielectric; short channel effect; simulation-based analysis; stack gate insulator structure; CMOS technology; Degradation; Dielectrics and electrical insulation; High K dielectric materials; High-K gate dielectrics; MOSFET circuits; Medical simulation; Microelectronics; Threshold voltage; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
Conference_Location :
Hsinchu
ISSN :
1524-766X
Print_ISBN :
0-7803-6412-0
Type :
conf
DOI :
10.1109/VTSA.2001.934523
Filename :
934523
Link To Document :
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