DocumentCode
3254626
Title
An efficient clock scheme for low-voltage four-phase charge pumps
Author
Lin, Hongchin ; Chen, Nai-Hsien
Author_Institution
Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan
fYear
2001
fDate
2001
Firstpage
228
Lastpage
231
Abstract
A new four-phase clock scheme for the four-phase charge pumping circuits at very low supply voltages using 0.5 μm double poly CMOS technology to generate high boosted voltages is presented. The boosted clocks are applied on the capacitors connected to the gates of the major pumping transistors. With the new clock generator, the charge pump can efficiently pump to 8 V using 10 stages at Vdd=1 V by simulations and 4.7 V using 4 stages at Vdd=1.5 V by measurements
Keywords
CMOS memory circuits; clocks; low-power electronics; pulse generators; 0.5 micron; 4.7 V; 8 V; boosted voltages; clock generator; double poly CMOS technology; low-voltage four-phase charge pumps; memory circuits; pumping transistors; very low supply voltages; CMOS technology; Capacitors; Charge pumps; Circuit simulation; Clocks; Current measurement; Degradation; Low voltage; MOSFETs; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
0-7803-6412-0
Type
conf
DOI
10.1109/VTSA.2001.934526
Filename
934526
Link To Document