A low complexity, low power, programmable QRS detector based on wavelet transform for Implantable Pacemaker IC

Author

Hoang, Thanh-Tung ; Son, Jong-Pil ; Kang, Yu-Ri ; Kim, Chae-Ryung ; Chung, Hae-Young ; Kim, Soo-Won

Author_Institution

Dept. of Electr. Eng., Korea Univ., Seoul

fYear

2006

fDate

24-27 Sept. 2006

Firstpage

160

Lastpage

163

Abstract

This paper presents a QRS detector operating in multi-mode with low complexity, power saving consumption for implantable pacemaker IC. The complexity of detector is optimized after testing dynamic range of internal signals. Correspondingly, static power consumption is reduced significantly. The dynamic power consumption is saved by using down-sampling rate structure and turning off de- active filter banks bases on noise estimation. This QRS detector is evaluated with MIT-BIH Arrhythmia database archives >99% detection ratio. A soft IP core is prototyped on FPGA and synthesized by Samsung 0.18um standard library.

Keywords

channel bank filters; field programmable gate arrays; integrated circuit design; low-power electronics; pacemakers; signal detection; wavelet transforms; FPGA; MIT-BIH Arrhythmia database; database archives; deactive filter banks; down sampling rate structure; implantable pacemaker IC; internal signals; programmable QRS detector; size 0.18 mum; static power consumption; wavelet transform; Active filters; Active noise reduction; Detectors; Dynamic range; Energy consumption; Integrated circuit noise; Integrated circuit testing; Pacemakers; Turning; Wavelet transforms;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2006 IEEE International

Conference_Location

Taipei

Print_ISBN

0-7803-9781-9

Electronic_ISBN

0-7803-9782-7

Type

conf

DOI

10.1109/SOCC.2006.283872

Filename

4063041