• DocumentCode
    3254713
  • Title

    A programmable BIST for embedded SDRAM

  • Author

    Zhang, Mike ; Tao, Derek ; Wei, Belle

  • Author_Institution
    Dept. of Electr. Eng., San Jose State Univ., CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    244
  • Lastpage
    248
  • Abstract
    The BIST (Built-In-Self-Test) provides a cost-effective solution in testing an embedded DRAM. This project develops a programmable BIST in support of a variety of test algorithms and SDRAM operation modes. The Verilog BIST modules are parameterized such that an SDRAM BIST circuit can be generated for a given SDRAM configuration. Also developed is software supporting mapping between physical and logical addresses and data, as well as translation from assembly programs to machine code used directly by the BIST. The result is an easy-to-use BIST generator for testing embedded SDRAMS
  • Keywords
    DRAM chips; automatic testing; built-in self test; integrated circuit testing; logic testing; BIST generator; Verilog BIST modules; embedded SDRAM; logical addresses; operation modes; physical addresses; programmable BIST; test algorithms; Built-in self-test; Circuit faults; Circuit testing; Computer architecture; Educational institutions; Hardware design languages; Life testing; Logic testing; Read only memory; SDRAM;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    0-7803-6412-0
  • Type

    conf

  • DOI
    10.1109/VTSA.2001.934530
  • Filename
    934530