Fast placement-dependent full chip thermal simulation

A general purpose semiconductor device/process simulator, PROPHET, has been adapted for full chip thermal analysis and is capable of quickly (~1 minute CPU time) assessing the impact of functional block placement on chip temperature distribution. The key to fast simulation is a new algorithm which maps the heat generation of functional blocks to a coarse mesh while maintaining conservation of heat generating sources. Design of two high-performance CPU chips based on bulk CMOS and SOI technologies, with total power consumption of 100 and 60 watts, respectively, has been evaluated for thermal performance using this approach. Excellent results have been achieved in terms of benchmarked accuracy and computational efficiency. Up to seven interconnect layers have been included in the simulation; effects of packaging are modeled using two capping thermally resistive layers on top and bottom of the chip. Considering the extremely non-uniform nature of interconnect/interleaving-insulating layers, anisotropic thermal conductivity is a critical factor in modeling thermal properties and has been implemented in the simulator. The potential benefit of using pure silicon (Si-28), which has a higher thermal conductivity than that of natural silicon (1.6 times as big at the room temperature), in reducing the peak chip temperature has also been studied. It is shown that with a power consumption level of 100 watts, the peak temperature can be lowered by about 10% (from 136 to 123°C)