Title :
An improved architecture and implementation of cascaded integrator-comb decimation filters
Author :
Gao, Yonghong ; Jia, Lihong ; Tenhunen, Hannu
Author_Institution :
Electron. Syst. Design Lab., R. Inst. of Technol., Stockholm, Sweden
Abstract :
In this paper an improved version of the nonrecursive carry-save-adder-based structure for CIC (cascaded-integrator-comb) decimation filters is proposed for high speed applications. By employing parallel processing techniques, the improved structure can further increase the sampling rate of CIC filters. Low-complexity implementation of the parallel stages is also discussed
Keywords :
FIR filters; adders; cascade networks; comb filters; digital filters; integrating circuits; parallel architectures; CIC filters; FIR filter; cascaded integrator-comb decimation filters; high speed applications; low-complexity implementation; nonrecursive carry-save-adder-based structure; parallel architecture; parallel processing techniques; Added delay; Adders; CMOS technology; Finite impulse response filter; Laboratories; Parallel processing; Pipeline processing; Registers; Sampling methods; Signal sampling;
Conference_Titel :
Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-5582-2
DOI :
10.1109/PACRIM.1999.799540
