Stack capacitor integration with buried oxygen barrier using chemical mechanical polishing of noble metals

Author

Schnabel, R.F. ; Beitel, G. ; Bosk, P. ; Dehm, C. ; Hauser, A. ; Kasko, I. ; Mainka, G. ; Mikolajick, T. ; Müllegger, H.D. ; Nagel, N. ; Röhner, M. ; Poppa, S. ; Sama, C. ; Scheler, U. ; Weinrich, V.

Author_Institution

Div. of Memory Products, Infineon Technol., Munich, Germany

fYear

2001

fDate

2001

Firstpage

264

Lastpage

266

Abstract

A novel integration scheme for the formation of stack capacitor electrodes and diffusion barriers is presented. The concept makes use of chemical mechanical polishing of noble metals and allows the integration of a dielectric barrier. Electrical data is presented showing excellent parametric yield of contact resistance comparable to standard integration using RIE. Based on the data presented, a variety of new integration schemes for new materials can be deducted

Keywords

CMOS integrated circuits; MOS capacitors; chemical mechanical polishing; contact resistance; diffusion barriers; electrodes; integrated circuit metallisation; integrated circuit technology; iridium; oxygen; CMP; Ir; IrO₂; O₂; buried oxygen barrier; capacitor electrode formation; chemical mechanical polishing; contact resistance; dielectric barrier; diffusion barriers; noble metals; stack capacitor integration; Capacitors; Chemicals; Conducting materials; Contact resistance; Dielectric materials; Dielectric substrates; Electrodes; Etching; Ferroelectric materials; Oxygen;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

0-7803-6412-0

Type

conf

DOI

10.1109/VTSA.2001.934535

Filename

934535