DocumentCode :
3254849
Title :
Low power designing in VLSI chips
Author :
Malhotra, Navneesh Singh
Author_Institution :
Dept. of Electron. & Commun., Jamia Millia Islamia, New Delhi, India
fYear :
2015
fDate :
19-20 March 2015
Firstpage :
948
Lastpage :
951
Abstract :
Reducing power consumption is an indispensible subject in today´s world. In today´s scenario, reducing power consumption is the key challenge. The increasing need and usage of portable devices such as cell phones, laptops etc and the need to decrease power usage and power loss has led to an inclination towards development of new techniques to curb this problem. This paper discusses the various causes of power dissipation in VLSI chips, and reviews all the strategies and methodologies that can be applied for low power designing. A comparison between the 4004 processor and the core i7 processor has also been drawn to throw light on the practical need for low power designing and where it has led us to as of now.
Keywords :
integrated circuit design; low-power electronics; microprocessor chips; VLSI chips; core i7 processor; low power design; power consumption reduction; power dissipation; CMOS integrated circuits; Capacitance; Leakage currents; Power dissipation; Short-circuit currents; Switches; Very large scale integration; CMOS; VLSI chips; low power designing; low power dissipation; processor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Engineering and Applications (ICACEA), 2015 International Conference on Advances in
Conference_Location :
Ghaziabad
Type :
conf
DOI :
10.1109/ICACEA.2015.7164842
Filename :
7164842
Link To Document :
بازگشت